mirror of
https://github.com/open-goal/jak-project.git
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f9d8fcd6e4
* mips 2 c basic version, not yet tested * calling works without crashing, but the function doesn't * it works * add test * cleanup and actually add the test * dont use mips2c by default for font * clean up formatting
780 lines
27 KiB
C++
780 lines
27 KiB
C++
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#include <set>
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#include "mips2c.h"
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#include "decompiler/Disasm/InstructionMatching.h"
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#include "decompiler/Function/Function.h"
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#include "decompiler/ObjectFile/LinkedObjectFile.h"
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namespace decompiler {
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//////////////////////
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// Register Helpers
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//////////////////////
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Register rs7() {
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return make_gpr(Reg::S7);
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}
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Register rr0() {
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return make_gpr(Reg::R0);
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}
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Register rfp() {
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return make_gpr(Reg::FP);
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}
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Register rra() {
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return make_gpr(Reg::RA);
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}
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Register rt9() {
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return make_gpr(Reg::T9);
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}
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Register rv0() {
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return make_gpr(Reg::V0);
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}
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Register rsp() {
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return make_gpr(Reg::SP);
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}
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Register make_vf(int idx) {
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return Register(Reg::VF, idx);
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}
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std::string goal_to_c_name(const std::string& name) {
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std::string result;
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for (auto c : name) {
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if (c == '!' || c == '?' || c == '*') {
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continue;
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}
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if (c == '-') {
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c = '_';
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}
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result.push_back(c);
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}
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return result;
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}
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std::string goal_to_c_function_name(const FunctionName& name) {
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switch (name.kind) {
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case FunctionName::FunctionKind::GLOBAL:
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return goal_to_c_name(name.function_name);
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default:
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assert(false);
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}
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}
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const char* reg_to_name(const InstructionAtom& atom) {
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assert(atom.is_reg());
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return atom.get_reg().to_charp();
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}
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struct Mips2C_Line {
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std::string code;
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std::string comment;
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Mips2C_Line() = default;
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Mips2C_Line(const std::string& _code) : code(_code) {}
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Mips2C_Line(const std::string& _code, const std::string& _comment)
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: code(_code), comment(_comment) {}
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};
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struct Mips2C_Output {
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void output_label(int block_idx) { lines.push_back(fmt::format("\nblock_{}:", block_idx)); }
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void output_line_comment(const std::string& text) { lines.emplace_back("// " + text); }
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void output_instr(const std::string& instr, const std::string& comment) {
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lines.emplace_back(instr, comment);
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}
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std::string write_to_string(const FunctionName& goal_func_name) const {
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std::string name = goal_to_c_function_name(goal_func_name);
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std::string result = "//--------------------------MIPS2C---------------------\n";
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result += "#include \"game/mips2c/mips2c_private.h\"\n";
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result += "#include \"game/kernel/kscheme.h\"\n";
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// start of namespace for this function
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result += "namespace Mips2C {\n";
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result += fmt::format("namespace {} {{\n", name);
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if (!symbol_cache.empty()) {
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result += "struct Cache {\n";
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for (auto& sym : symbol_cache) {
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result += fmt::format(" void* {}; // {}\n", goal_to_c_name(sym), sym);
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}
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result += "} cache;\n\n";
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}
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result += "u64 execute(void* ctxt) {\n";
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result += " auto* c = (ExecutionContext*)ctxt;\n";
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result += " bool bc = false;";
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for (auto& line : lines) {
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result += " ";
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result += line.code;
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if (!line.comment.empty()) {
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if (line.code.length() < 50) {
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for (int i = 0; i < 50 - (int)line.code.length(); i++) {
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result.push_back(' ');
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}
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}
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result.append("// ");
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result.append(line.comment);
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}
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result += '\n';
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}
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result += "end_of_function:\n return c->gprs[v0].du64[0];\n";
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result += "}\n\n";
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// link function:
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result += "void link() {\n";
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for (auto& sym : symbol_cache) {
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result += fmt::format(" cache.{} = intern_from_c(\"{}\").c();\n", goal_to_c_name(sym), sym);
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}
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result +=
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fmt::format(" gLinkedFunctionTable.reg(\"{}\", execute);\n", goal_func_name.to_string());
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result += "}\n\n";
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result += fmt::format("}} // namespace {}\n", name);
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result += "} // namespace Mips2C\n";
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result +=
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fmt::format("// add {}::link to the link callback table for the object file.\n", name);
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result += "// FWD DEC:\n";
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result += fmt::format("namespace {} {{ extern void link(); }}\n", name);
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return result;
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}
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void require_symbol(const std::string& name) { symbol_cache.insert(name); }
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std::vector<Mips2C_Line> lines;
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std::set<std::string> symbol_cache;
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};
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struct M2C_Block {
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int idx = -1;
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int succ_branch = -1;
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int succ_ft = -1;
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std::vector<int> pred;
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int start_instr = -1;
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int end_instr = -1;
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bool has_branch = false;
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bool branch_likely = false;
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bool branch_always = false;
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bool has_pred(int pidx) const {
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for (auto p : pred) {
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if (p == pidx) {
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return true;
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}
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}
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return false;
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}
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};
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void link_fall_through(int first_idx, int second_idx, std::vector<M2C_Block>& blocks) {
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auto& first = blocks.at(first_idx);
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auto& second = blocks.at(second_idx);
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assert(first.succ_ft == -1); // don't want to overwrite something by accident.
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// can only fall through to the next code in memory.
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assert(first_idx + 1 == second_idx);
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first.succ_ft = second_idx;
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if (!second.has_pred(first_idx)) {
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// if a block can block fall through and branch to the same block, we want to avoid adding
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// it as a pred twice. This is rare, but does happen and makes sense with likely branches
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// which only run the delay slot when taken.
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second.pred.push_back(first_idx);
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}
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}
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void link_branch(int first_idx, int second_idx, std::vector<M2C_Block>& blocks) {
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auto& first = blocks.at(first_idx);
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auto& second = blocks.at(second_idx);
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assert(first.succ_branch == -1);
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first.succ_branch = second_idx;
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if (!second.has_pred(first_idx)) {
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// see comment in link_fall_through
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second.pred.push_back(first_idx);
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}
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}
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void link_fall_through_likely(int first_idx, int second_idx, std::vector<M2C_Block>& blocks) {
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auto& first = blocks.at(first_idx);
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auto& second = blocks.at(second_idx);
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assert(first.succ_ft == -1); // don't want to overwrite something by accident.
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// can only fall through to the next code in memory.
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assert(first_idx + 2 == second_idx);
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first.succ_ft = second_idx;
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if (!second.has_pred(first_idx)) {
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// see comment in link_fall_through
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second.pred.push_back(first_idx);
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}
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}
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/*!
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* Compute predecessor and successor of each block
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*
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* NOTE: due to likely branch delays/etc, succ_ft and succ_branch behave strangely.
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*
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* The succ_ft destination is always taken if has_branch is false.
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* The succ_branch destination is always taken if branch_always it true.
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*
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* Otherwise, has_branch is true, and the succ_branch is taken if the branch condition is true.
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* The succ_ft and succ_branch may be _anywhere_. succ_ft may not always be the next destination.
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*/
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std::vector<M2C_Block> setup_preds_and_succs(const Function& func, const LinkedObjectFile& file) {
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// create m2c blocks
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std::vector<M2C_Block> blocks;
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blocks.resize(func.basic_blocks.size());
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for (size_t i = 0; i < blocks.size(); i++) {
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blocks[i].idx = i;
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blocks[i].start_instr = func.basic_blocks[i].start_word;
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blocks[i].end_instr = func.basic_blocks[i].end_word;
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}
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// set up succ / pred
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for (int i = 0; i < int(func.basic_blocks.size()); i++) {
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auto& b = func.basic_blocks[i];
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assert(!blocks.at(i).branch_always);
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bool not_last = (i + 1) < int(func.basic_blocks.size());
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if (b.end_word == b.start_word) {
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// there's no room for a branch here, fall through to the end
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if (not_last) {
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link_fall_through(i, i + 1, blocks);
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}
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} else {
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// room for at least a likely branch, try that first.
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int likely_branch_idx = b.end_word - 1;
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assert(likely_branch_idx >= b.start_word);
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auto& likely_branch_candidate = func.instructions.at(likely_branch_idx);
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if (is_branch(likely_branch_candidate, true)) {
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// is a likely branch
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blocks.at(i).has_branch = true;
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blocks.at(i).branch_likely = true;
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// blocks.at(i).kind = CfgVtx::DelaySlotKind::NO_DELAY;
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bool branch_always = is_always_branch(likely_branch_candidate);
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// need to find block target
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int block_target = -1;
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int label_target = likely_branch_candidate.get_label_target();
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assert(label_target != -1);
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const auto& label = file.labels.at(label_target);
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// assert(label.target_segment == seg);
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assert((label.offset % 4) == 0);
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int offset = label.offset / 4 - func.start_word;
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assert(offset >= 0);
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for (int j = int(func.basic_blocks.size()); j-- > 0;) {
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if (func.basic_blocks[j].start_word == offset) {
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block_target = j;
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break;
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}
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}
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assert(block_target != -1);
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// "branch" to delay slot, which then "falls through" to the destination.
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link_branch(i, i + 1, blocks);
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if (branch_always) {
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// don't continue to the next one
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blocks.at(i).branch_always = true;
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} else {
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// not an always branch
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if (not_last) {
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// "fall through" to after the delay slot block.
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// don't take the delay slot.
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link_fall_through_likely(i, i + 2, blocks);
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}
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}
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auto& delay_block = blocks.at(i + 1);
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delay_block.branch_likely = false;
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delay_block.branch_always = true;
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delay_block.has_branch = true;
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// delay_block.kind = CfgVtx::DelaySlotKind::NO_DELAY;
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link_branch(i + 1, block_target, blocks);
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} else {
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if (b.end_word - b.start_word < 2) {
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// no room for a branch, just fall through
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if (not_last) {
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link_fall_through(i, i + 1, blocks);
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}
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} else {
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// try as a normal branch.
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int idx = b.end_word - 2;
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assert(idx >= b.start_word);
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auto& branch_candidate = func.instructions.at(idx);
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// auto& delay_slot_candidate = func.instructions.at(idx + 1);
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if (is_branch(branch_candidate, false)) {
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blocks.at(i).has_branch = true;
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blocks.at(i).branch_likely = false;
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// blocks.at(i).kind = get_delay_slot(delay_slot_candidate);
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bool branch_always = is_always_branch(branch_candidate);
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// need to find block target
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int block_target = -1;
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int label_target = branch_candidate.get_label_target();
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assert(label_target != -1);
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const auto& label = file.labels.at(label_target);
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// assert(label.target_segment == seg);
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assert((label.offset % 4) == 0);
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int offset = label.offset / 4 - func.start_word;
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assert(offset >= 0);
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// the order here matters when there are zero size blocks. Unclear what the best answer
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// is.
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// i think in end it doesn't actually matter??
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// for (int j = 0; j < int(func.basic_blocks.size()); j++) {
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for (int j = int(func.basic_blocks.size()); j-- > 0;) {
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if (func.basic_blocks[j].start_word == offset) {
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block_target = j;
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break;
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}
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}
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assert(block_target != -1);
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link_branch(i, block_target, blocks);
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if (branch_always) {
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// don't continue to the next one
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blocks.at(i).branch_always = true;
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} else {
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// not an always branch
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if (not_last) {
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link_fall_through(i, i + 1, blocks);
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}
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}
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} else {
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// not a branch.
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if (not_last) {
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link_fall_through(i, i + 1, blocks);
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}
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}
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}
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}
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}
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}
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return blocks;
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}
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bool block_requires_label(const Function* f,
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const std::vector<M2C_Block>& blocks,
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size_t block_idx) {
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const auto& block = blocks[block_idx];
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if (block.pred.empty()) {
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// no way to get to this block??
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if (block_idx != 0) {
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// don't warn on the first block.
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lg::warn("Mips2C function {} block {} is unreachable.", f->name(), block_idx);
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}
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return false;
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}
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if (block.pred.size() == 1 && block_idx > 0 && block.pred.front() == (int)block_idx - 1 &&
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blocks.at(block_idx - 1).succ_ft == (int)block_idx) {
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// the only way to get to this block is to fall through.
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return false;
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}
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return true;
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}
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int g_unknown = 0;
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Mips2C_Line handle_unknown(const std::string& instr_str) {
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g_unknown++;
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return fmt::format("// Unknown instr: {}", instr_str);
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}
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Mips2C_Line handle_generic_load(const Instruction& i0, const std::string& instr_str) {
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if (i0.get_src(1).is_reg(rsp())) {
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return handle_unknown(instr_str);
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} else {
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return {fmt::format("c->{}({}, {}, {});", i0.op_name_to_string(), reg_to_name(i0.get_dst(0)),
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i0.get_src(0).get_imm(), reg_to_name(i0.get_src(1))),
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instr_str};
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}
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}
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Mips2C_Line handle_lw(Mips2C_Output& out, const Instruction& i0, const std::string& instr_str) {
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if (i0.get_src(1).is_reg(rs7()) && i0.get_src(0).is_sym()) {
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// symbol load.
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out.require_symbol(i0.get_src(0).get_sym());
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return {fmt::format("c->load_symbol({}, cache.{});", reg_to_name(i0.get_dst(0)),
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goal_to_c_name(i0.get_src(0).get_sym())),
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instr_str};
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} else {
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// fall back to standard loads
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return handle_generic_load(i0, instr_str);
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}
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}
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Mips2C_Line handle_generic_store(Mips2C_Output& /*out*/,
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const Instruction& i0,
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const std::string& instr_str) {
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if (i0.get_src(2).is_reg(Register(Reg::GPR, Reg::SP))) {
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return handle_unknown(instr_str);
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} else {
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return {fmt::format("c->{}({}, {}, {});", i0.op_name_to_string(), reg_to_name(i0.get_src(0)),
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i0.get_src(1).get_imm(), reg_to_name(i0.get_src(2))),
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instr_str};
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}
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}
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Mips2C_Line handle_generic_op2_u16(const Instruction& i0, const std::string& instr_str) {
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return {fmt::format("c->{}({}, {}, {});", i0.op_name_to_string(), reg_to_name(i0.get_dst(0)),
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reg_to_name(i0.get_src(0)), i0.get_src(1).get_imm()),
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instr_str};
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}
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Mips2C_Line handle_sw(Mips2C_Output& out, const Instruction& i0, const std::string& instr_str) {
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if (i0.get_src(1).is_sym() && i0.get_src(2).is_reg(rs7())) {
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return handle_unknown(instr_str);
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// auto name = i0.get_src(1).get_sym();
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// // store into symbol table!
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// SimpleAtom val;
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// if (i0.get_src(0).is_reg(rs7())) {
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// // store a false
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// val = SimpleAtom::make_sym_val("#f");
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// } else if (i0.get_src(0).is_reg(rr0())) {
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// // store a 0
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// val = SimpleAtom::make_int_constant(0);
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// } else {
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// // store a register.
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// val = make_src_atom(i0.get_src(0).get_reg(), idx);
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// }
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// return std::make_unique<StoreOp>(4, StoreOp::Kind::INTEGER,
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// SimpleAtom::make_sym_val(name).as_expr(), val, idx);
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} else {
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return handle_generic_store(out, i0, instr_str);
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}
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}
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std::string dest_to_char(u8 x) {
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if (x == 0) {
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return "NONE";
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}
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std::string dest;
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if (x & 8)
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dest.push_back('x');
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if (x & 4)
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dest.push_back('y');
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if (x & 2)
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dest.push_back('z');
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if (x & 1)
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dest.push_back('w');
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return dest;
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}
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Mips2C_Line handle_generic_op3_bc_mask(const Instruction& i0,
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const std::string& instr_str,
|
|
const std::string& op_name) {
|
|
return {fmt::format("c->{}(DEST::{}, BC::{}, {}, {}, {});", op_name, dest_to_char(i0.cop2_dest),
|
|
i0.cop2_bc_to_char(), reg_to_name(i0.get_dst(0)), reg_to_name(i0.get_src(0)),
|
|
reg_to_name(i0.get_src(1))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_generic_op3_mask(const Instruction& i0,
|
|
const std::string& instr_str,
|
|
const std::string& op_name) {
|
|
return {fmt::format("c->{}(DEST::{}, {}, {}, {});", op_name, dest_to_char(i0.cop2_dest),
|
|
reg_to_name(i0.get_dst(0)), reg_to_name(i0.get_src(0)),
|
|
reg_to_name(i0.get_src(1))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_generic_op3(const Instruction& i0,
|
|
const std::string& instr_str,
|
|
const std::optional<std::string>& name_override) {
|
|
return {fmt::format("c->{}({}, {}, {});", name_override ? *name_override : i0.op_name_to_string(),
|
|
reg_to_name(i0.get_dst(0)), reg_to_name(i0.get_src(0)),
|
|
reg_to_name(i0.get_src(1))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_generic_op2_mask(const Instruction& i0,
|
|
const std::string& instr_str,
|
|
const std::string& op_name) {
|
|
return {fmt::format("c->{}(DEST::{}, {}, {});", op_name, dest_to_char(i0.cop2_dest),
|
|
reg_to_name(i0.get_dst(0)), reg_to_name(i0.get_src(0))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_generic_op2(const Instruction& i0,
|
|
const std::string& instr_str,
|
|
const std::string& op_name) {
|
|
return {fmt::format("c->{}({}, {});", op_name, reg_to_name(i0.get_dst(0)),
|
|
reg_to_name(i0.get_src(0))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_or(const Instruction& i0, const std::string& instr_str) {
|
|
if (is_gpr_3(i0, InstructionKind::OR, {}, rs7(), rr0())) {
|
|
// set reg_dest to #f : or reg_dest, s7, r0
|
|
return handle_unknown(instr_str);
|
|
} else if (is_gpr_3(i0, InstructionKind::OR, {}, rr0(), rr0())) {
|
|
// set reg_dest to 0 : or reg_dest, r0, r0
|
|
return handle_unknown(instr_str);
|
|
} else if (is_gpr_3(i0, InstructionKind::OR, {}, {}, rr0())) {
|
|
// set dst to src : or dst, src, r0
|
|
return {
|
|
fmt::format("c->mov64({}, {});", reg_to_name(i0.get_dst(0)), reg_to_name(i0.get_src(0))),
|
|
instr_str};
|
|
} else {
|
|
// actually do a logical OR of two registers: or a0, a1, a2
|
|
return handle_unknown(instr_str);
|
|
}
|
|
}
|
|
|
|
Mips2C_Line handle_sll(const Instruction& i0, const std::string& instr_str) {
|
|
if (is_nop(i0)) {
|
|
return {"// nop", instr_str};
|
|
} else {
|
|
return handle_generic_op2_u16(i0, instr_str);
|
|
}
|
|
}
|
|
|
|
Mips2C_Line handle_vmula_bc(const Instruction& i0, const std::string& instr_str) {
|
|
return {fmt::format("c->vmula_bc(DEST::{}, BC::{}, {}, {});", dest_to_char(i0.cop2_dest),
|
|
i0.cop2_bc_to_char(), reg_to_name(i0.get_src(0)), reg_to_name(i0.get_src(1))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_vmadda_bc(const Instruction& i0, const std::string& instr_str) {
|
|
return {fmt::format("c->vmadda_bc(DEST::{}, BC::{}, {}, {});", dest_to_char(i0.cop2_dest),
|
|
i0.cop2_bc_to_char(), reg_to_name(i0.get_src(0)), reg_to_name(i0.get_src(1))),
|
|
instr_str};
|
|
}
|
|
|
|
std::string reg64_or_zero(const InstructionAtom& atom) {
|
|
if (atom.is_reg(Register(Reg::GPR, Reg::R0))) {
|
|
return "0";
|
|
} else {
|
|
return fmt::format("c->sgpr64({})", atom.get_reg().to_string());
|
|
}
|
|
}
|
|
|
|
Mips2C_Line handle_branch_reg2(const Instruction& i0,
|
|
const std::string& instr_str,
|
|
const std::string& op_name) {
|
|
return {fmt::format("bc = {} {} {};", reg64_or_zero(i0.get_src(0)), op_name,
|
|
reg64_or_zero(i0.get_src(1))),
|
|
instr_str};
|
|
}
|
|
|
|
Mips2C_Line handle_non_likely_branch_bc(const Instruction& i0, const std::string& instr_str) {
|
|
switch (i0.kind) {
|
|
case InstructionKind::BNE:
|
|
return handle_branch_reg2(i0, instr_str, "!=");
|
|
case InstructionKind::BEQ:
|
|
return handle_branch_reg2(i0, instr_str, "==");
|
|
case InstructionKind::BLTZ:
|
|
return {fmt::format("bc = ((s64){}) < 0;", reg64_or_zero(i0.get_src(0))), instr_str};
|
|
case InstructionKind::BGTZ:
|
|
return {fmt::format("bc = ((s64){}) > 0;", reg64_or_zero(i0.get_src(0))), instr_str};
|
|
default:
|
|
return handle_unknown(instr_str);
|
|
}
|
|
}
|
|
|
|
Mips2C_Line handle_vdiv(const Instruction& i0, const std::string& instr_string) {
|
|
return {fmt::format("c->vdiv({}, BC::{}, {}, BC::{});", reg_to_name(i0.get_src(0)),
|
|
"xyzw"[i0.get_src(1).get_vf_field()], reg_to_name(i0.get_src(2)),
|
|
"xyzw"[i0.get_src(3).get_vf_field()]),
|
|
instr_string};
|
|
}
|
|
|
|
Mips2C_Line handle_por(const Instruction& i0, const std::string& instr_string) {
|
|
if (is_gpr_3(i0, InstructionKind::POR, {}, {}, rr0())) {
|
|
return {fmt::format("c->mov128_gpr_gpr({}, {});", reg_to_name(i0.get_dst(0)),
|
|
reg_to_name(i0.get_src(0))),
|
|
instr_string};
|
|
} else {
|
|
return handle_generic_op3(i0, instr_string, {});
|
|
}
|
|
}
|
|
|
|
Mips2C_Line handle_normal_instr(Mips2C_Output& output,
|
|
const Instruction& i0,
|
|
const std::string& instr_str,
|
|
int& unknown_count) {
|
|
switch (i0.kind) {
|
|
case InstructionKind::LW:
|
|
return handle_lw(output, i0, instr_str);
|
|
case InstructionKind::LBU:
|
|
case InstructionKind::LWU:
|
|
case InstructionKind::LQ:
|
|
case InstructionKind::LQC2:
|
|
return handle_generic_load(i0, instr_str);
|
|
case InstructionKind::SQ:
|
|
case InstructionKind::SQC2:
|
|
return handle_generic_store(output, i0, instr_str);
|
|
case InstructionKind::VADD_BC:
|
|
return handle_generic_op3_bc_mask(i0, instr_str, "vadd_bc");
|
|
case InstructionKind::VSUB_BC:
|
|
return handle_generic_op3_bc_mask(i0, instr_str, "vsub_bc");
|
|
case InstructionKind::VMUL_BC:
|
|
return handle_generic_op3_bc_mask(i0, instr_str, "vmul_bc");
|
|
case InstructionKind::VMUL:
|
|
return handle_generic_op3_mask(i0, instr_str, "vmul");
|
|
case InstructionKind::VADD:
|
|
return handle_generic_op3_mask(i0, instr_str, "vadd");
|
|
case InstructionKind::VSUB:
|
|
return handle_generic_op3_mask(i0, instr_str, "vsub");
|
|
case InstructionKind::OR:
|
|
return handle_or(i0, instr_str);
|
|
case InstructionKind::SW:
|
|
return handle_sw(output, i0, instr_str);
|
|
case InstructionKind::VMOVE:
|
|
return handle_generic_op2_mask(i0, instr_str, "vmove");
|
|
case InstructionKind::VITOF0:
|
|
return handle_generic_op2_mask(i0, instr_str, "vitof0");
|
|
case InstructionKind::VFTOI4:
|
|
return handle_generic_op2_mask(i0, instr_str, "vftoi4");
|
|
case InstructionKind::ANDI:
|
|
case InstructionKind::ORI:
|
|
case InstructionKind::SRA:
|
|
return handle_generic_op2_u16(i0, instr_str);
|
|
case InstructionKind::SLL:
|
|
return handle_sll(i0, instr_str);
|
|
case InstructionKind::DADDU:
|
|
case InstructionKind::ADDU:
|
|
case InstructionKind::PEXTLH:
|
|
case InstructionKind::PEXTLB:
|
|
case InstructionKind::MOVN:
|
|
case InstructionKind::MOVZ:
|
|
return handle_generic_op3(i0, instr_str, {});
|
|
case InstructionKind::AND:
|
|
return handle_generic_op3(i0, instr_str, "and_"); // and isn't allowed in C++
|
|
case InstructionKind::DADDIU:
|
|
case InstructionKind::ADDIU:
|
|
return handle_generic_op2_u16(i0, instr_str);
|
|
case InstructionKind::QMTC2:
|
|
return handle_generic_op2(i0, instr_str, "mov128_vf_gpr");
|
|
case InstructionKind::QMFC2:
|
|
return handle_generic_op2(i0, instr_str, "mov128_gpr_vf");
|
|
case InstructionKind::VMULA_BC:
|
|
return handle_vmula_bc(i0, instr_str);
|
|
case InstructionKind::VMADDA_BC:
|
|
return handle_vmadda_bc(i0, instr_str);
|
|
case InstructionKind::VMADD_BC:
|
|
return handle_generic_op3_bc_mask(i0, instr_str, "vmadd_bc");
|
|
case InstructionKind::VDIV:
|
|
return handle_vdiv(i0, instr_str);
|
|
case InstructionKind::POR:
|
|
return handle_por(i0, instr_str);
|
|
case InstructionKind::VMULQ:
|
|
return handle_generic_op2_mask(i0, instr_str, "vmulq");
|
|
case InstructionKind::VNOP:
|
|
return {"// nop", instr_str};
|
|
case InstructionKind::MFC1:
|
|
return handle_generic_op2(i0, instr_str, "mfc1");
|
|
default:
|
|
unknown_count++;
|
|
return handle_unknown(instr_str);
|
|
|
|
break;
|
|
}
|
|
}
|
|
|
|
void run_mips2c(Function* f) {
|
|
g_unknown = 0;
|
|
auto* file = f->ir2.env.file;
|
|
auto blocks = setup_preds_and_succs(*f, *file);
|
|
Mips2C_Output output;
|
|
int unknown_count = 0;
|
|
|
|
for (size_t block_idx = 0; block_idx < blocks.size(); block_idx++) {
|
|
const auto& block = blocks[block_idx];
|
|
// fmt::print("block {}: {} to {}\n", block_idx, block.start_instr, block.end_instr);
|
|
if (block_requires_label(f, blocks, block_idx)) {
|
|
output.output_label(block_idx);
|
|
} else {
|
|
// output.comment_line("block {}",)
|
|
}
|
|
|
|
for (int i = block.start_instr; i < block.end_instr; i++) {
|
|
size_t old_line_count = output.lines.size();
|
|
auto& instr = f->instructions.at(i);
|
|
auto instr_str = instr.to_string(file->labels);
|
|
|
|
if (is_branch(instr, {})) {
|
|
if (block.branch_likely) {
|
|
output.lines.push_back(handle_unknown(instr_str));
|
|
} else {
|
|
if (is_always_branch(instr)) {
|
|
// skip the branch ins.
|
|
output.lines.emplace_back("//" + instr_str, instr_str);
|
|
// then the delay slot
|
|
assert(i + 1 < block.end_instr);
|
|
i++;
|
|
auto& delay_i = f->instructions.at(i);
|
|
auto delay_i_str = delay_i.to_string(file->labels);
|
|
output.lines.push_back(
|
|
handle_normal_instr(output, delay_i, delay_i_str, unknown_count));
|
|
assert(i + 1 == block.end_instr);
|
|
// then the goto
|
|
output.lines.emplace_back(fmt::format("goto block_{};", block.succ_branch),
|
|
"branch always\n");
|
|
} else {
|
|
// set the branch condition
|
|
output.lines.push_back(handle_non_likely_branch_bc(instr, instr_str));
|
|
// then the delay slot
|
|
assert(i + 1 < block.end_instr);
|
|
i++;
|
|
auto& delay_i = f->instructions.at(i);
|
|
auto delay_i_str = delay_i.to_string(file->labels);
|
|
output.lines.push_back(
|
|
handle_normal_instr(output, delay_i, delay_i_str, unknown_count));
|
|
assert(i + 1 == block.end_instr);
|
|
// then the goto
|
|
output.lines.emplace_back(fmt::format("if (bc) {{goto block_{};}}", block.succ_branch),
|
|
"branch non-likely\n");
|
|
}
|
|
}
|
|
} else if (is_jr_ra(instr)) {
|
|
// skip
|
|
output.lines.emplace_back("//" + instr_str, instr_str);
|
|
// then the delay slot
|
|
assert(i + 1 < block.end_instr);
|
|
i++;
|
|
auto& delay_i = f->instructions.at(i);
|
|
auto delay_i_str = delay_i.to_string(file->labels);
|
|
output.lines.push_back(handle_normal_instr(output, delay_i, delay_i_str, unknown_count));
|
|
assert(i + 1 == block.end_instr);
|
|
// then the goto
|
|
output.lines.emplace_back(fmt::format("goto end_of_function;", block.succ_branch),
|
|
"return\n");
|
|
} else {
|
|
output.lines.push_back(handle_normal_instr(output, instr, instr_str, unknown_count));
|
|
}
|
|
// fmt::print("I: {}\n", instr_str);
|
|
|
|
assert(output.lines.size() > old_line_count);
|
|
}
|
|
}
|
|
|
|
f->mips2c_output = output.write_to_string(f->guessed_name);
|
|
if (g_unknown > 0) {
|
|
lg::error("Mips to C pass in {} hit {} unknown instructions", f->name(), g_unknown);
|
|
}
|
|
}
|
|
} // namespace decompiler
|