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https://github.com/open-goal/jak-project.git
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a80b331c27
* begin work on vf support * split reg kind into reg hw kind and class, use class for ireg * try test * clang format * add some more ops and some example functions * better lvf on statics * add documentation
101 lines
3.7 KiB
C++
101 lines
3.7 KiB
C++
#include "Register.h"
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#include <stdexcept>
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namespace emitter {
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RegisterInfo RegisterInfo::make_register_info() {
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RegisterInfo info;
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info.m_info[RAX] = {-1, false, false, "rax"}; // temp
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info.m_info[RCX] = {3, false, false, "rcx"}; // temp
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info.m_info[RDX] = {2, false, false, "rdx"}; // temp
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info.m_info[RBX] = {-1, true, false, "rbx"}; //
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info.m_info[RSP] = {-1, false, true, "rsp"};
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info.m_info[RBP] = {-1, true, false, "rbp"};
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info.m_info[RSI] = {1, false, false, "rsi"};
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info.m_info[RDI] = {0, false, false, "rdi"};
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info.m_info[R8] = {4, false, false, "r8"};
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info.m_info[R9] = {5, false, false, "r9"};
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info.m_info[R10] = {6, true, false, "r10"};
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info.m_info[R11] = {7, true, false, "r11"};
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info.m_info[R12] = {-1, true, false, "r12"};
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info.m_info[R13] = {-1, false, true, "r13"}; // pp?
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info.m_info[R14] = {-1, false, true, "r14"}; // st?
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info.m_info[R15] = {-1, false, true, "r15"}; // offset.
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info.m_info[XMM0] = {-1, false, false, "xmm0"};
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info.m_info[XMM1] = {-1, false, false, "xmm1"};
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info.m_info[XMM2] = {-1, false, false, "xmm2"};
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info.m_info[XMM3] = {-1, false, false, "xmm3"};
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info.m_info[XMM4] = {-1, false, false, "xmm4"};
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info.m_info[XMM5] = {-1, false, false, "xmm5"};
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info.m_info[XMM6] = {-1, false, false, "xmm6"};
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info.m_info[XMM7] = {-1, false, false, "xmm7"};
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info.m_info[XMM8] = {-1, true, false, "xmm8"};
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info.m_info[XMM9] = {-1, true, false, "xmm9"};
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info.m_info[XMM10] = {-1, true, false, "xmm10"};
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info.m_info[XMM11] = {-1, true, false, "xmm11"};
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info.m_info[XMM12] = {-1, true, false, "xmm12"};
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info.m_info[XMM13] = {-1, true, false, "xmm13"};
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info.m_info[XMM14] = {-1, true, false, "xmm14"};
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info.m_info[XMM15] = {-1, true, false, "xmm15"};
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info.m_arg_regs = std::array<Register, N_ARGS>({RDI, RSI, RDX, RCX, R8, R9, R10, R11});
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info.m_saved_gprs = std::array<Register, N_SAVED_GPRS>({RBX, RBP, R10, R11, R12});
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info.m_saved_xmms =
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std::array<Register, N_SAVED_XMMS>({XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15});
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for (size_t i = 0; i < N_SAVED_GPRS; i++) {
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info.m_saved_all[i] = info.m_saved_gprs[i];
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}
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for (size_t i = 0; i < N_SAVED_XMMS; i++) {
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info.m_saved_all[i + N_SAVED_GPRS] = info.m_saved_xmms[i];
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}
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// todo - experiment with better orders for allocation.
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info.m_gpr_alloc_order = {RAX, RCX, RDX, RBX, RBP, RSI, RDI, R8, R9, R10, R11}; // arbitrary
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info.m_xmm_alloc_order = {XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14};
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// these should only be temp registers!
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info.m_gpr_temp_only_alloc_order = {RAX, RCX, RDX, RSI, RDI, R8, R9};
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info.m_xmm_temp_only_alloc_order = {XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7};
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info.m_gpr_spill_temp_alloc_order = {RAX, RCX, RDX, RBX, RBP, RSI,
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RDI, R8, R9, R10, R11, R12}; // arbitrary
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info.m_xmm_spill_temp_alloc_order = {XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15};
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return info;
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}
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RegisterInfo gRegInfo = RegisterInfo::make_register_info();
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std::string to_string(HWRegKind kind) {
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switch (kind) {
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case HWRegKind::GPR:
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return "gpr";
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case HWRegKind::XMM:
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return "xmm";
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default:
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throw std::runtime_error("Unsupported HWRegKind");
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}
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}
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HWRegKind reg_class_to_hw(RegClass reg_class) {
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switch (reg_class) {
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case RegClass::VECTOR_FLOAT:
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case RegClass::FLOAT:
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case RegClass::INT_128:
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return HWRegKind::XMM;
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case RegClass::GPR_64:
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return HWRegKind::GPR;
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default:
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assert(false);
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}
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}
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std::string Register::print() const {
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return gRegInfo.get_info(*this).name;
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}
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} // namespace emitter
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