mirror of
https://github.com/open-goal/jak-project.git
synced 2024-10-20 21:27:52 -04:00
9737dfad34
Resolves #19
611 lines
11 KiB
C++
611 lines
11 KiB
C++
#pragma once
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#ifndef JAK_INSTRUCTION_H
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#define JAK_INSTRUCTION_H
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#include <cassert>
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#include "common/common_types.h"
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namespace emitter {
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/*!
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* The ModRM byte
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*/
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struct ModRM {
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uint8_t mod;
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uint8_t reg_op;
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uint8_t rm;
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uint8_t operator()() const { return (mod << 6) | (reg_op << 3) | (rm << 0); }
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};
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/*!
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* The SIB Byte
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*/
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struct SIB {
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uint8_t scale, index, base;
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uint8_t operator()() const { return (scale << 6) | (index << 3) | (base << 0); }
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};
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/*!
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* An Immediate (either imm or disp)
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*/
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struct Imm {
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Imm() = default;
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Imm(uint8_t sz, uint64_t v) : size(sz), value(v) {}
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uint8_t size;
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union {
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uint64_t value;
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uint8_t v_arr[8];
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};
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};
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/*!
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* The REX prefix byte
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*/
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struct REX {
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explicit REX(bool w = false, bool r = false, bool x = false, bool b = false)
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: W(w), R(r), X(x), B(b) {}
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// W - 64-bit operands
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// R - reg extension
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// X - SIB i extnsion
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// B - other extension
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bool W, R, X, B;
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uint8_t operator()() const { return (1 << 6) | (W << 3) | (R << 2) | (X << 1) | (B << 0); }
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};
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/*!
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* A high-level description of an x86-64 opcode. It can emit itself.
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*/
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struct Instruction {
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Instruction(uint8_t opcode) : op(opcode) {}
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uint8_t op;
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bool op2_set = false;
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uint8_t op2;
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bool op3_set = false;
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uint8_t op3;
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// if true, don't emit anything
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bool is_null = false;
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// flag to indicate it's the first instruction of a function and needs align and type tag
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bool is_function_start = false;
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// the rex byte
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bool set_rex = false;
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uint8_t m_rex = 0;
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// the modrm byte
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bool set_modrm = false;
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uint8_t m_modrm = 0;
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// the sib byte
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bool set_sib = false;
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uint8_t m_sib = 0;
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// the displacement
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bool set_disp_imm = false;
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Imm disp;
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// the immediate
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bool set_imm = false;
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Imm imm;
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// which IR instruction does this go with?
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// this is only set for the first instruction generated from an IR.
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int ir_index = -1;
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/*!
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* Move opcode byte 0 to before the rex prefix.
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*/
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void swap_op0_rex() {
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if (!set_rex)
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return;
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auto temp = op;
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op = m_rex;
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m_rex = temp;
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}
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void set(REX r) {
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m_rex = r();
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set_rex = true;
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}
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void set(ModRM modrm) {
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m_modrm = modrm();
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set_modrm = true;
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}
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void set(SIB sib) {
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m_sib = sib();
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set_sib = true;
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}
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void set_disp(Imm i) {
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disp = i;
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set_disp_imm = true;
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}
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void set(Imm i) {
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imm = i;
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set_imm = true;
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}
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void set_op2(uint8_t b) {
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op2_set = true;
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op2 = b;
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}
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void set_op3(uint8_t b) {
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op3_set = true;
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op3 = b;
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}
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int get_imm_size() const {
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if (set_imm) {
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return imm.size;
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} else {
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return 0;
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}
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}
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int get_disp_size() const {
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if (set_disp_imm) {
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return disp.size;
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} else {
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return 0;
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}
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}
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/*!
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* Set modrm and rex as needed for two regs.
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*/
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void set_modrm_and_rex(uint8_t reg, uint8_t rm, uint8_t mod, bool rex_w = false) {
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bool rex_b = false, rex_r = false;
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if (rm >= 8) {
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rm -= 8;
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rex_b = true;
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}
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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ModRM modrm;
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modrm.mod = mod;
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modrm.reg_op = reg;
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modrm.rm = rm;
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set(modrm);
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if (rex_b || rex_w || rex_r) {
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set(REX(rex_w, rex_r, false, rex_b));
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}
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}
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void set_modrm_and_rex_for_reg_plus_reg_plus_s8(uint8_t reg,
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uint8_t addr1,
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uint8_t addr2,
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s8 offset,
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bool rex_w) {
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bool rex_b = false, rex_r = false, rex_x = false;
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bool addr1_ext = false;
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bool addr2_ext = false;
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if (addr1 >= 8) {
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addr1 -= 8;
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addr1_ext = true;
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}
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if (addr2 >= 8) {
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addr2 -= 8;
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addr2_ext = true;
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}
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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ModRM modrm;
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modrm.mod = 1; // no disp
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modrm.rm = 4; // sib!
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modrm.reg_op = reg;
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SIB sib;
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sib.scale = 0;
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Imm imm2(1, offset);
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// default addr1 in index
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if (addr1 == 4) {
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sib.index = addr2;
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sib.base = addr1;
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rex_x = addr2_ext;
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rex_b = addr1_ext;
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} else {
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// addr1 in index
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sib.index = addr1;
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sib.base = addr2;
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rex_x = addr1_ext;
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rex_b = addr2_ext;
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}
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assert(sib.index != 4);
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if (rex_b || rex_w || rex_r || rex_x) {
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set(REX(rex_w, rex_r, rex_x, rex_b));
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}
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set(modrm);
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set(sib);
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set_disp(imm2);
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}
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void set_modrm_and_rex_for_reg_plus_reg_plus_s32(uint8_t reg,
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uint8_t addr1,
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uint8_t addr2,
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s32 offset,
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bool rex_w) {
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bool rex_b = false, rex_r = false, rex_x = false;
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bool addr1_ext = false;
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bool addr2_ext = false;
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if (addr1 >= 8) {
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addr1 -= 8;
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addr1_ext = true;
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}
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if (addr2 >= 8) {
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addr2 -= 8;
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addr2_ext = true;
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}
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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ModRM modrm;
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modrm.mod = 2; // no disp
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modrm.rm = 4; // sib!
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modrm.reg_op = reg;
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SIB sib;
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sib.scale = 0;
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Imm imm2(4, offset);
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// default addr1 in index
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if (addr1 == 4) {
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sib.index = addr2;
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sib.base = addr1;
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rex_x = addr2_ext;
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rex_b = addr1_ext;
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} else {
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// addr1 in index
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sib.index = addr1;
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sib.base = addr2;
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rex_x = addr1_ext;
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rex_b = addr2_ext;
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}
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assert(sib.index != 4);
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if (rex_b || rex_w || rex_r || rex_x) {
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set(REX(rex_w, rex_r, rex_x, rex_b));
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}
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set(modrm);
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set(sib);
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set_disp(imm2);
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}
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void set_modrm_and_rex_for_reg_plus_reg_addr(uint8_t reg,
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uint8_t addr1,
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uint8_t addr2,
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bool rex_w = false,
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bool rex_always = false) {
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bool rex_b = false, rex_r = false, rex_x = false;
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bool addr1_ext = false;
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bool addr2_ext = false;
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if (addr1 >= 8) {
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addr1 -= 8;
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addr1_ext = true;
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}
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if (addr2 >= 8) {
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addr2 -= 8;
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addr2_ext = true;
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}
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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ModRM modrm;
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modrm.mod = 0; // no disp
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modrm.rm = 4; // sib!
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modrm.reg_op = reg;
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SIB sib;
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sib.scale = 0;
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if (addr1 == 5 && addr2 == 5) {
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sib.index = addr1;
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sib.base = addr2;
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rex_x = addr1_ext;
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rex_b = addr2_ext;
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modrm.mod = 1;
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set_disp(Imm(1, 0));
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} else {
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// default addr1 in index
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bool flipped = (addr1 == 4) || (addr2 == 5);
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if (flipped) {
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sib.index = addr2;
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sib.base = addr1;
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rex_x = addr2_ext;
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rex_b = addr1_ext;
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} else {
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// addr1 in index
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sib.index = addr1;
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sib.base = addr2;
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rex_x = addr1_ext;
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rex_b = addr2_ext;
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}
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assert(sib.base != 5);
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assert(sib.index != 4);
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}
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if (rex_b || rex_w || rex_r || rex_x || rex_always) {
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set(REX(rex_w, rex_r, rex_x, rex_b));
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}
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set(modrm);
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set(sib);
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}
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/*!
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* Set modrm and rex as needed for two regs for an addressing mode.
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* Will set SIB if R12 or RSP indexing is used.
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*/
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void set_modrm_and_rex_for_reg_addr(uint8_t reg, uint8_t rm, bool rex_w = false) {
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bool rex_b = false, rex_r = false;
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if (rm >= 8) {
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rm -= 8;
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rex_b = true;
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}
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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ModRM modrm;
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modrm.mod = 0;
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modrm.reg_op = reg;
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modrm.rm = rm;
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if (rm == 4) {
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SIB sib;
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sib.scale = 0;
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sib.base = 4;
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sib.index = 4;
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set(sib);
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}
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if (rm == 5) {
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modrm.mod = 1; // 1 byte imm
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set_disp(Imm(1, 0));
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}
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set(modrm);
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if (rex_b || rex_w || rex_r) {
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set(REX(rex_w, rex_r, false, rex_b));
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}
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}
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void set_modrm_and_rex_for_rip_plus_s32(uint8_t reg, s32 offset, bool rex_w = false) {
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bool rex_r = false;
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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ModRM modrm;
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modrm.mod = 0;
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modrm.reg_op = reg;
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modrm.rm = 5; // use the RIP addressing mode
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set(modrm);
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if (rex_r || rex_w) {
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set(REX(rex_w, rex_r, false, false));
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}
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set_disp(Imm(4, offset));
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}
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void add_rex() {
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if (!set_rex) {
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set(REX());
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}
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}
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/*!
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* Set up modrm and rex for the commonly used 32-bit immediate displacement indexing mode.
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*/
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void set_modrm_rex_sib_for_reg_reg_disp32(uint8_t reg, uint8_t mod, uint8_t rm, bool rex_w) {
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ModRM modrm;
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bool rex_r = false;
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if (reg >= 8) {
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reg -= 8;
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rex_r = true;
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}
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modrm.reg_op = reg;
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modrm.mod = mod;
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modrm.rm = 4; // use sib
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SIB sib;
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sib.scale = 0;
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sib.index = 4;
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bool rex_b = false;
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if (rm >= 8) {
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rex_b = true;
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rm -= 8;
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}
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sib.base = rm;
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set(modrm);
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set(sib);
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if (rex_r || rex_w || rex_b) {
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set(REX(rex_w, rex_r, false, rex_b));
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}
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}
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/*!
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* Get the position of the disp immediate relative to the start of the instruction
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*/
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int offset_of_disp() const {
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if (is_null)
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return 0;
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assert(set_disp_imm);
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int offset = 0;
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if (set_rex)
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offset++;
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offset++; // opcode
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if (op2_set)
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offset++;
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if (op3_set)
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offset++;
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if (set_modrm)
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offset++;
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if (set_sib)
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offset++;
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return offset;
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}
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/*!
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* Get the position of the imm immediate relative to the start of the instruction
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*/
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int offset_of_imm() const {
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if (is_null)
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return 0;
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assert(set_imm);
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int offset = 0;
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if (set_rex)
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offset++;
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offset++; // opcode
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if (op2_set)
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offset++;
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if (op3_set)
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offset++;
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if (set_modrm)
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offset++;
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if (set_sib)
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offset++;
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if (set_disp_imm)
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offset += disp.size;
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return offset;
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}
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/*!
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* Emit into a buffer and return how many bytes written (can be zero)
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*/
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uint8_t emit(uint8_t* buffer) const {
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if (is_null)
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return 0;
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uint8_t count = 0;
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if (set_rex) {
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buffer[count++] = m_rex;
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}
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buffer[count++] = op;
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if (op2_set) {
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buffer[count++] = op2;
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}
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if (op3_set) {
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buffer[count++] = op3;
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}
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if (set_modrm) {
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buffer[count++] = m_modrm;
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}
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if (set_sib) {
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buffer[count++] = m_sib;
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}
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if (set_disp_imm) {
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for (int i = 0; i < disp.size; i++) {
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buffer[count++] = disp.v_arr[i];
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}
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}
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if (set_imm) {
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for (int i = 0; i < imm.size; i++) {
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buffer[count++] = imm.v_arr[i];
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}
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}
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return count;
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}
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uint8_t length() const {
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if (is_null)
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return 0;
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uint8_t count = 0;
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if (set_rex) {
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count++;
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}
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count++;
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if (op2_set) {
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count++;
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}
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if (op3_set) {
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count++;
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}
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if (set_modrm) {
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count++;
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}
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if (set_sib) {
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count++;
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}
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if (set_disp_imm) {
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for (int i = 0; i < disp.size; i++) {
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count++;
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}
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}
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if (set_imm) {
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for (int i = 0; i < imm.size; i++) {
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count++;
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}
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}
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return count;
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}
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};
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} // namespace emitter
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#endif // JAK_INSTRUCTION_H
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