2020-10-26 21:08:24 -04:00
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;;-*-Lisp-*-
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2020-09-04 14:44:23 -04:00
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(in-package goal)
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;; name: gs.gc
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;; name in dgo: gs
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;; dgos: GAME, ENGINE
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2021-07-09 22:20:37 -04:00
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;; Types for the GS - the PS2's GPU.
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;; These are used when creating GS packets to be sent to the GIF
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;; or for directly interfacing with the memory-mapped GS control registers.
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2021-04-13 00:36:05 -04:00
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;; the GS's PMODE register makes various settings for the PCRTC.
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2021-02-22 09:36:30 -05:00
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(deftype gs-pmode (uint64)
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2021-04-13 00:36:05 -04:00
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((en1 uint8 :offset 0 :size 1)
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(en2 uint8 :offset 1 :size 1)
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(crtmd uint8 :offset 2 :size 3)
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(mmod uint8 :offset 5 :size 1)
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(amod uint8 :offset 6 :size 1)
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(slbg uint8 :offset 7 :size 1)
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(alp uint8 :offset 8 :size 8)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's SMODE2 register makes settings related to PCRTC video synchronization.
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2021-02-22 09:36:30 -05:00
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(deftype gs-smode2 (uint64)
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2021-04-13 00:36:05 -04:00
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((int uint8 :offset 0 :size 1)
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(ffmd uint8 :offset 1 :size 1)
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(dpms uint8 :offset 2 :size 2)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-07-09 22:20:37 -04:00
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;; texture formats
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2021-04-26 21:40:08 -04:00
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(defenum gs-psm
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:bitfield #f
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:type uint8
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(ct32 0)
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(ct24 1)
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(ct16 2)
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(ct16s 10)
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(mt8 19)
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(mt4 20)
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(mt8h 27)
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(mt4hl 36)
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(mt4hh 44)
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(mz32 48)
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(mz24 49)
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(mz16 50)
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(mz16s 58)
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)
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(defun psm-size ((arg0 gs-psm))
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"Convert texture format to some type of size."
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2021-02-22 09:36:30 -05:00
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(cond
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2021-07-11 21:59:27 -04:00
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((= arg0 (gs-psm mt8))
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64
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)
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((= arg0 (gs-psm mt4))
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32
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)
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((or
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(= arg0 (gs-psm ct16))
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(= arg0 (gs-psm ct16s))
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(= arg0 (gs-psm mz16))
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(= arg0 (gs-psm mz16s))
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2021-04-26 21:40:08 -04:00
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)
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2021-07-11 21:59:27 -04:00
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128
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2021-02-22 09:36:30 -05:00
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)
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2021-07-11 21:59:27 -04:00
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(else
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256
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)
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)
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2021-02-22 09:36:30 -05:00
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)
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2021-04-26 21:40:08 -04:00
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(defun psm-page-height ((arg0 gs-psm))
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"Convert texture format to some type of page height"
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2021-02-22 09:36:30 -05:00
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(cond
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2021-07-11 21:59:27 -04:00
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((= arg0 (gs-psm mt8))
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64
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)
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((= arg0 (gs-psm mt4))
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128
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)
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((or
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(= arg0 (gs-psm ct16))
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(= arg0 (gs-psm ct16s))
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(= arg0 (gs-psm mz16))
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(= arg0 (gs-psm mz16s))
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2021-04-26 21:40:08 -04:00
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)
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2021-07-11 21:59:27 -04:00
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64
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2021-02-22 09:36:30 -05:00
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)
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2021-07-11 21:59:27 -04:00
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(else
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32
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)
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)
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2021-02-22 09:36:30 -05:00
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)
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2021-04-26 21:40:08 -04:00
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(defun psm->string ((arg0 gs-psm))
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"Get the name of a texture format."
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2021-08-09 19:18:53 -04:00
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(enum->string gs-psm arg0)
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2021-02-22 09:36:30 -05:00
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)
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2021-08-01 17:11:32 -04:00
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(defenum gs-reg
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:type uint8
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(prim 0)
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(rgbaq 1)
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(st 2)
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(uv 3)
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(xyzf2 4)
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(xyz2 5)
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(tex0-1 6)
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(tex0-2 7)
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(clamp-1 8)
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(clamp-2 9)
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(fog 10)
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(xyzf3 12)
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(xyz3 13)
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(tex1-1 20)
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(tex1-2 21)
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(tex2-1 22)
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(tex2-2 23)
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(xyoffset-1 24)
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(xyoffset-2 25)
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(prmodecont 26)
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(prmode 27)
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(texclut 28)
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(scanmsk 34)
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(miptbp1-1 52)
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(miptbp1-2 53)
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(miptbp2-1 54)
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(miptbp2-2 55)
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(texa 59)
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(fogcol 61)
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(texflush 63)
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(scissor-1 64)
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(scissor-2 65)
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(alpha-1 66)
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(alpha-2 67)
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(dimx 68)
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(dthe 69)
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(colclamp 70)
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(test-1 71)
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(test-2 72)
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(pabe 73)
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(fba-1 74)
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(fba-2 75)
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(frame-1 76)
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(frame-2 77)
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(zbuf-1 78)
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(zbuf-2 79)
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(bitbltbuf 80)
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(trxpos 81)
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(trxreg 82)
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(trxdir 83)
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(hwreg 84)
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(signal 96)
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(finish 97)
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(label 98)
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)
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(defenum gs-reg64
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:type uint64
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:copy-entries gs-reg
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's DISPFB registers make settings for the frame buffer regarding information on
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;; Rectangular Area Read Output Circuit n for the PCRTC.
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;; write-only
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2021-02-22 09:36:30 -05:00
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(deftype gs-display-fb (uint64)
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2021-04-13 00:36:05 -04:00
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((fbp uint16 :offset 0 :size 9)
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(fbw uint8 :offset 9 :size 6)
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2021-04-26 21:40:08 -04:00
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(psm gs-psm :offset 15 :size 5)
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2021-04-13 00:36:05 -04:00
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(dbx uint16 :offset 32 :size 11)
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(dby uint16 :offset 43 :size 11)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-26 21:40:08 -04:00
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2021-04-13 00:36:05 -04:00
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;; the GS's DISPLAY registers make settings for the display position on the screen regarding
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;; information on Rectangular Area Read Output Circuit n for the PCRTC.
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;; write-only
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2021-02-22 09:36:30 -05:00
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(deftype gs-display (uint64)
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2021-04-13 00:36:05 -04:00
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((dx uint16 :offset 0 :size 12)
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(dy uint16 :offset 12 :size 11)
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(magh uint8 :offset 23 :size 4)
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(magv uint8 :offset 27 :size 2)
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(dw uint16 :offset 32 :size 12)
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(dh uint16 :offset 44 :size 11)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-26 21:40:08 -04:00
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2021-04-13 00:36:05 -04:00
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;; the GS's BGCOLOR register sets the background color of the PCRTC with RGB value.
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;; write-only
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2021-02-22 09:36:30 -05:00
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(deftype gs-bgcolor (uint64)
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2021-04-26 08:44:13 -04:00
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((r uint8 :offset 0)
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(g uint8 :offset 8)
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(b uint8 :offset 16)
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2021-04-13 00:36:05 -04:00
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-26 21:40:08 -04:00
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2021-04-13 00:36:05 -04:00
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;; the GS's CSR register sets and obtains various GS statuses.
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;; read-write. the fields have different effects depending on whether they're being read from
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;; or written to.
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;; bits 5 and 6 (0x20 and 0x40) should be zero
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2021-02-22 09:36:30 -05:00
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(deftype gs-csr (uint64)
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((signal uint8 :offset 0 :size 1)
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(finish uint8 :offset 1 :size 1)
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(hsint uint8 :offset 2 :size 1)
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(vsint uint8 :offset 3 :size 1)
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(edwint uint8 :offset 4 :size 1)
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(flush uint8 :offset 8 :size 1)
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(reset uint8 :offset 9 :size 1)
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(nfield uint8 :offset 12 :size 1)
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(field uint8 :offset 13 :size 1)
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(fifo uint8 :offset 14 :size 2)
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(rev uint8 :offset 16 :size 8)
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(id uint8 :offset 24 :size 8)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-07-09 22:20:37 -04:00
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;; memory layout of the GS's privileged registers (mapped to EE memory)
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2021-04-13 00:36:05 -04:00
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;; it is missing the SIGLBLID/LABELID register at 4224 (useless anyway?)
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2021-02-22 09:36:30 -05:00
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(deftype gs-bank (structure)
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((pmode gs-pmode :offset-assert 0)
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(smode2 gs-smode2 :offset 32)
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(dspfb1 gs-display-fb :offset 112)
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(display1 gs-display :offset 128)
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(dspfb2 gs-display-fb :offset 144)
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(display2 gs-display :offset 160)
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(extbuf uint64 :offset 176)
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(extdata uint64 :offset 192)
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(extwrite uint64 :offset 208)
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(bgcolor gs-bgcolor :offset 224)
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(csr gs-csr :offset 4096)
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(imr uint64 :offset 4112)
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(busdir uint64 :offset 4160)
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)
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:method-count-assert 9
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:size-assert #x1048
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:flag-assert #x900001048
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)
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2021-04-26 21:40:08 -04:00
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2021-04-13 00:36:05 -04:00
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;; the GS's FRAME registers store various settings related to the frame buffer.
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2021-02-22 09:36:30 -05:00
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(deftype gs-frame (uint64)
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2021-04-13 00:36:05 -04:00
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((fbp uint16 :offset 0 :size 9)
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(fbw uint8 :offset 16 :size 6)
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2021-08-01 17:11:32 -04:00
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(psm gs-psm :offset 24 :size 6)
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2021-04-13 00:36:05 -04:00
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(fbmsk uint32 :offset 32 :size 32)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-26 21:40:08 -04:00
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2021-04-13 00:36:05 -04:00
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;; the GS's ZBUF registers make various settings regarding Z buffer.
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2021-02-22 09:36:30 -05:00
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(deftype gs-zbuf (uint64)
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2021-04-13 00:36:05 -04:00
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((zbp uint16 :offset 0 :size 9)
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2021-08-01 17:11:32 -04:00
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(psm gs-psm :offset 24 :size 4)
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2021-04-13 00:36:05 -04:00
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(zmsk uint8 :offset 32 :size 1)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's XYOFFSET registers set the offset value for converting from the primitive coordinate
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;; system to the window coordinate system.
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2021-02-22 09:36:30 -05:00
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(deftype gs-xy-offset (uint64)
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2021-04-13 00:36:05 -04:00
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((ofx uint16 :offset 0 :size 16)
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(ofy uint16 :offset 32 :size 16)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's SCISSOR registers specify the scissoring area. The coordinate values for
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;; the upper-left/lower-right points of the enabled drawing area are specified by the window
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;; coordinate system.
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2021-02-22 09:36:30 -05:00
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(deftype gs-scissor (uint64)
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2021-04-13 00:36:05 -04:00
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((scax0 uint16 :offset 0 :size 11)
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(scax1 uint16 :offset 16 :size 11)
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(scay0 uint16 :offset 32 :size 11)
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(scay1 uint16 :offset 48 :size 11)
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)
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's PRMODECONT register sets whether to use primitive attributes (IIP, TME, FGE, ABE,
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;; AA1, FST, CTXT, FIX) specified by the PRMODE register or the PRIM register.
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2021-02-22 09:36:30 -05:00
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(deftype gs-prmode-cont (uint64)
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2021-04-13 00:36:05 -04:00
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((ac uint8 :offset 0 :size 1))
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's COLCLAMP register stores settings as to whether clamping for the RGB value of the
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;; pixel is performed.
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2021-02-22 09:36:30 -05:00
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(deftype gs-color-clamp (uint64)
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2021-04-13 00:36:05 -04:00
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((clamp uint8 :offset 0 :size 1))
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-04-13 00:36:05 -04:00
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;; the GS's DTHE register stores settings for dithering (performed/not performed).
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2021-02-22 09:36:30 -05:00
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(deftype gs-dthe (uint64)
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2021-04-13 00:36:05 -04:00
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((dthe uint8 :offset 0 :size 1))
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2021-02-22 09:36:30 -05:00
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:flag-assert #x900000008
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)
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2021-08-01 17:11:32 -04:00
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(defenum gs-atest
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:type uint8
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(never 0)
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(always 1)
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(less 2)
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|
|
(less-equal 3)
|
|
|
|
(equal 4)
|
|
|
|
(greater-equal 5)
|
|
|
|
(greater 6)
|
|
|
|
(not-equal 7)
|
|
|
|
)
|
|
|
|
(defenum gs-ztest
|
|
|
|
:type uint8
|
|
|
|
(never 0)
|
|
|
|
(always 1)
|
|
|
|
(greater-equal 2)
|
|
|
|
(greater 3)
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TEST register performs settings related to the pixel test.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-test (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((ate uint8 :offset 0 :size 1) ;; alpha test enable
|
2021-08-01 17:11:32 -04:00
|
|
|
(atst gs-atest :offset 1 :size 3) ;; alpha test method
|
2021-04-13 00:36:05 -04:00
|
|
|
(aref uint8 :offset 4 :size 8) ;; alpha val reference
|
|
|
|
(afail uint8 :offset 12 :size 2) ;; processing method on alpha test fail
|
|
|
|
(date uint8 :offset 14 :size 1) ;; dest alpha test enable
|
|
|
|
(datm uint8 :offset 15 :size 1) ;; dest alpha test mode
|
|
|
|
(zte uint8 :offset 16 :size 1) ;; depth test enable
|
2021-08-01 17:11:32 -04:00
|
|
|
(ztst gs-ztest :offset 17 :size 2) ;; depth test method
|
2021-04-13 00:36:05 -04:00
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-16 18:36:19 -04:00
|
|
|
|
2021-04-19 20:29:38 -04:00
|
|
|
(defenum gs-prim-type
|
|
|
|
:type uint8
|
2021-04-16 18:36:19 -04:00
|
|
|
(point 0)
|
|
|
|
(line 1)
|
|
|
|
(line-strip 2)
|
|
|
|
(tri 3)
|
|
|
|
(tri-strip 4)
|
|
|
|
(tri-fan 5)
|
|
|
|
(sprite 6)
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's PRIM register specifies the types of drawing primitives and various attributes, and
|
|
|
|
;; initializes the contents of the vertex queue.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-prim (uint64)
|
2021-04-19 20:29:38 -04:00
|
|
|
((prim gs-prim-type :offset 0 :size 3)
|
2021-04-13 00:36:05 -04:00
|
|
|
(iip uint8 :offset 3 :size 1)
|
|
|
|
(tme uint8 :offset 4 :size 1)
|
|
|
|
(fge uint8 :offset 5 :size 1)
|
|
|
|
(abe uint8 :offset 6 :size 1)
|
|
|
|
(aa1 uint8 :offset 7 :size 1)
|
|
|
|
(fst uint8 :offset 8 :size 1)
|
|
|
|
(ctxt uint8 :offset 9 :size 1)
|
|
|
|
(fix uint8 :offset 10 :size 1)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's RGBAQ register sets the RGBA value of the vertex and the Q value of the normalized
|
|
|
|
;; texture coordinates.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-rgbaq (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((r uint8 :offset 0 :size 8)
|
|
|
|
(g uint8 :offset 8 :size 8)
|
|
|
|
(b uint8 :offset 16 :size 8)
|
|
|
|
(a uint8 :offset 24 :size 8) ;; 0x80 --> 1.0
|
|
|
|
(q float :offset 32 :size 32) ;; affects some LOD behavior apparently?
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; GS XYZ registers
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-xyz (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((x uint16 :offset 0 :size 16) ;; Q4 fixed point
|
|
|
|
(y uint16 :offset 16 :size 16) ;; Q4 fixed point
|
|
|
|
(z uint32 :offset 32 :size 32)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's UV register specifies the texel coordinate (UV) values of the vertex.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-uv (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((u uint16 :offset 0 :size 14) ;; Q4 fixed point
|
|
|
|
(v uint16 :offset 16 :size 14) ;; Q4 fixed point
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's ST register sets the S and T values of the vertex texture coordinates.
|
|
|
|
;; The value Q is specified by the RGBAQ register.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-st (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((s float :offset 0 :size 32)
|
|
|
|
(t float :offset 32 :size 32)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; GS XYZF registers
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-xyzf (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((x uint16 :offset 0 :size 16) ;; Q4 fixed point
|
|
|
|
(y uint16 :offset 16 :size 16) ;; Q4 fixed point
|
|
|
|
(z uint32 :offset 32 :size 24)
|
|
|
|
(f uint8 :offset 56 :size 8) ;; fog coeff
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TRXPOS register specifies the position and scanning direction of the rectangular area
|
|
|
|
;; in each buffer where buffer transmission is performed.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-trxpos (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((ssax uint16 :offset 0 :size 11)
|
|
|
|
(ssay uint16 :offset 16 :size 11)
|
|
|
|
(dsax uint16 :offset 32 :size 11)
|
|
|
|
(dsay uint16 :offset 48 :size 11)
|
|
|
|
(dir uint8 :offset 59 :size 2)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TRXREG register specifies the size of the rectangular area, where the transmission
|
|
|
|
;; between buffers is implemented, in units of pixels.
|
|
|
|
;; The pixel mode must be the one set by the BITBLTBUF register.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-trxreg (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((rrw uint16 :offset 0 :size 12)
|
|
|
|
(rrh uint16 :offset 32 :size 12)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TRXDIR register specifies the transmission direction in the transmission between
|
|
|
|
;; buffers, and activates transmission.
|
|
|
|
;; Appropriate settings must be made by the BITBLTBUF/TRXPOS/TRXREG before activating
|
|
|
|
;; the transmission.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-trxdir (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((xdir uint8 :offset 0 :size 2))
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's BITBLTBUF register stores buffer-related settings for transmission source and
|
|
|
|
;; destination during transmission between buffers.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-bitbltbuf (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((sbp uint16 :offset 0 :size 14)
|
|
|
|
(sbw uint8 :offset 16 :size 6)
|
|
|
|
(spsm uint8 :offset 24 :size 6)
|
|
|
|
(dbp uint16 :offset 32 :size 14)
|
|
|
|
(dbw uint8 :offset 48 :size 6)
|
|
|
|
(dpsm uint8 :offset 56 :size 6)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TEX0 registers set various kinds of information regarding the textures to be used.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-tex0 (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((tbp0 uint16 :offset 0 :size 14)
|
|
|
|
(tbw uint8 :offset 14 :size 6)
|
|
|
|
(psm uint8 :offset 20 :size 6)
|
|
|
|
(tw uint8 :offset 26 :size 4)
|
|
|
|
(th uint8 :offset 30 :size 4)
|
|
|
|
(tcc uint8 :offset 34 :size 1)
|
|
|
|
(tfx uint8 :offset 35 :size 2)
|
|
|
|
(cbp uint16 :offset 37 :size 14)
|
|
|
|
(cpsm uint8 :offset 51 :size 4)
|
|
|
|
(csm uint8 :offset 55 :size 1)
|
|
|
|
(csa uint8 :offset 56 :size 5)
|
|
|
|
(cld uint8 :offset 61 :size 3)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TEX1 registers set information on the sampling method of the textures.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-tex1 (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((lcm uint8 :offset 0 :size 1)
|
|
|
|
(mxl uint8 :offset 2 :size 3)
|
|
|
|
(mmag uint8 :offset 5 :size 1)
|
|
|
|
(mmin uint8 :offset 6 :size 3)
|
|
|
|
(mtba uint8 :offset 9 :size 1)
|
|
|
|
(l uint8 :offset 19 :size 2)
|
|
|
|
(k int16 :offset 32 :size 12)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TEXA register sets the Alpha value to be referred to when the Alpha value of the
|
|
|
|
;; texture is not an 8-bit value.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-texa (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((ta0 uint8 :offset 0 :size 8)
|
|
|
|
(aem uint8 :offset 15 :size 1)
|
|
|
|
(ta1 uint8 :offset 32 :size 8)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's TEXCLUT register specifies the CLUT position in the buffer when the CLUT storage mode
|
|
|
|
;; is CSM=1 (CSM2 mode).
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-texclut (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((cbw uint8 :offset 0 :size 6)
|
|
|
|
(cou uint8 :offset 6 :size 6)
|
|
|
|
(cov uint16 :offset 12 :size 10)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's MIPTBP registers set the buffer pointer and buffer width of textures when performing
|
|
|
|
;; MIPMAP.
|
|
|
|
;; MIPTBP1 sets levels 1 to 3, MIPTBP2 sets levels 4 to 6.
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-miptbp (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((tbp1 uint16 :offset 0 :size 14)
|
|
|
|
(tbw1 uint8 :offset 14 :size 6)
|
|
|
|
(tbp2 uint16 :offset 20 :size 14)
|
|
|
|
(tbw2 uint8 :offset 34 :size 6)
|
|
|
|
(tbp3 uint16 :offset 40 :size 14)
|
|
|
|
(tbw3 uint8 :offset 54 :size 6)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's ALPHA registers define the blend function of alpha blending
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-alpha (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((a uint8 :offset 0 :size 2)
|
|
|
|
(b uint8 :offset 2 :size 2)
|
|
|
|
(c uint8 :offset 4 :size 2)
|
|
|
|
(d uint8 :offset 6 :size 2)
|
|
|
|
(fix uint8 :offset 32 :size 8)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
2021-04-13 00:36:05 -04:00
|
|
|
;; the GS's CLAMP registers set the texture's wrap mode (repeating or clamping) for both S and T.
|
2021-08-01 17:11:32 -04:00
|
|
|
(defenum gs-tex-wrap-mode
|
|
|
|
:type uint8
|
|
|
|
(repeat 0)
|
|
|
|
(clamp 1)
|
|
|
|
(region-clamp 2)
|
|
|
|
(region-repeat 3)
|
|
|
|
)
|
|
|
|
|
2021-04-13 00:36:05 -04:00
|
|
|
(deftype gs-clamp (uint64)
|
2021-08-01 17:11:32 -04:00
|
|
|
((wms gs-tex-wrap-mode :offset 0 :size 2)
|
|
|
|
(wmt gs-tex-wrap-mode :offset 2 :size 2)
|
2021-04-13 00:36:05 -04:00
|
|
|
(minu uint16 :offset 4 :size 10)
|
|
|
|
(maxu uint16 :offset 14 :size 10)
|
|
|
|
(minv uint16 :offset 24 :size 10)
|
|
|
|
(maxv uint16 :offset 34 :size 10)
|
|
|
|
)
|
|
|
|
:flag-assert #x900000008
|
2021-02-22 09:36:30 -05:00
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gs-fog (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((f uint8 :offset 56 :size 8))
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gs-fogcol (uint64)
|
2021-04-13 00:36:05 -04:00
|
|
|
((fcr uint8 :offset 0 :size 8)
|
|
|
|
(fcg uint8 :offset 8 :size 8)
|
|
|
|
(fcb uint8 :offset 16 :size 8)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gif-ctrl (uint32)
|
2021-04-13 00:36:05 -04:00
|
|
|
((rst uint8 :offset 0 :size 1)
|
|
|
|
(pse uint8 :offset 3 :size 1)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
(deftype gif-mode (uint32)
|
2021-04-13 00:36:05 -04:00
|
|
|
((m3r uint8 :offset 0 :size 1)
|
|
|
|
(imt uint8 :offset 2 :size 1)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
(deftype gif-stat (uint32)
|
2021-04-13 00:36:05 -04:00
|
|
|
((m3r uint8 :offset 0 :size 1)
|
|
|
|
(m3p uint8 :offset 1 :size 1)
|
|
|
|
(imt uint8 :offset 2 :size 1)
|
|
|
|
(pse uint8 :offset 3 :size 1)
|
|
|
|
(ip3 uint8 :offset 5 :size 1)
|
|
|
|
(p3q uint8 :offset 6 :size 1)
|
|
|
|
(p2q uint8 :offset 7 :size 1)
|
|
|
|
(p1q uint8 :offset 8 :size 1)
|
|
|
|
(oph uint8 :offset 9 :size 1)
|
|
|
|
(apath uint8 :offset 10 :size 2)
|
|
|
|
(dir uint8 :offset 12 :size 1)
|
|
|
|
(fqc uint8 :offset 24 :size 5)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
(deftype gif-cnt (uint32)
|
2021-04-13 00:36:05 -04:00
|
|
|
((loopcnt uint16 :offset 0 :size 15)
|
|
|
|
(regcnt uint8 :offset 16 :size 4)
|
|
|
|
(vuaddr uint16 :offset 20 :size 10)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
(deftype gif-p3cnt (uint32)
|
2021-04-13 00:36:05 -04:00
|
|
|
((p3cnt uint16 :offset 0 :size 15))
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
(deftype gif-p3tag (uint32)
|
2021-04-13 00:36:05 -04:00
|
|
|
((loopcnt uint16 :offset 0 :size 15)
|
|
|
|
(eop uint8 :offset 15 :size 1)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gif-bank (structure)
|
|
|
|
((ctrl gif-ctrl :offset 0)
|
|
|
|
(mode gif-mode :offset 16)
|
|
|
|
(stat gif-stat :offset 32)
|
|
|
|
(tag0 uint32 :offset 64)
|
|
|
|
(tag1 uint32 :offset 80)
|
|
|
|
(tag2 uint32 :offset 96)
|
|
|
|
(tag3 uint32 :offset 112)
|
|
|
|
(cnt gif-cnt :offset 128)
|
|
|
|
(p3cnt gif-p3cnt :offset 144)
|
|
|
|
(p3tag gif-p3tag :offset 160)
|
|
|
|
)
|
|
|
|
:method-count-assert 9
|
|
|
|
:size-assert #xa4
|
|
|
|
:flag-assert #x9000000a4
|
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gif-tag-prim (uint32)
|
|
|
|
()
|
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
(deftype gif-tag-count (uint32)
|
|
|
|
()
|
|
|
|
:flag-assert #x900000004
|
|
|
|
)
|
|
|
|
|
2021-05-01 21:09:48 -04:00
|
|
|
(defenum gif-reg-id
|
2021-04-26 21:40:08 -04:00
|
|
|
:type uint8
|
|
|
|
(prim 0)
|
|
|
|
(rgbaq 1)
|
|
|
|
(st 2)
|
|
|
|
(uv 3)
|
|
|
|
(xyzf2 4)
|
|
|
|
(xyz2 5)
|
|
|
|
(tex0-1 6)
|
|
|
|
(tex0-2 7)
|
|
|
|
(clamp-1 8)
|
|
|
|
(clamp-2 9)
|
|
|
|
(fog 10)
|
|
|
|
(xyzf3 12)
|
|
|
|
(xyz3 13)
|
|
|
|
(a+d 14)
|
|
|
|
(nop 15)
|
|
|
|
)
|
|
|
|
|
2021-08-01 17:11:32 -04:00
|
|
|
(defenum gif-flag
|
|
|
|
:type uint8
|
|
|
|
(packed 0)
|
|
|
|
(reg-list 1)
|
|
|
|
(image 2)
|
|
|
|
(disable 3)
|
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gif-tag64 (uint64)
|
|
|
|
((nloop uint16 :offset 0 :size 15)
|
|
|
|
(eop uint8 :offset 15 :size 1)
|
|
|
|
(id uint16 :offset 32 :size 14)
|
|
|
|
(pre uint8 :offset 46 :size 1)
|
|
|
|
(prim gs-prim :offset 47 :size 11)
|
|
|
|
(flg gif-flag :offset 58 :size 2)
|
|
|
|
(nreg uint8 :offset 60 :size 4))
|
|
|
|
:flag-assert #x900000008
|
|
|
|
)
|
|
|
|
|
|
|
|
(deftype gif-tag (uint128)
|
|
|
|
((nloop uint16 :offset 0 :size 15)
|
|
|
|
(eop uint8 :offset 15 :size 1)
|
|
|
|
(id uint16 :offset 32 :size 14)
|
|
|
|
(pre uint8 :offset 46 :size 1)
|
|
|
|
(prim uint16 :offset 47 :size 11)
|
|
|
|
(flg gif-flag :offset 58 :size 2)
|
|
|
|
(nreg uint8 :offset 60 :size 4)
|
|
|
|
(regs0 gif-reg-id :offset 64 :size 4)
|
|
|
|
(regs1 gif-reg-id :offset 68 :size 4)
|
|
|
|
(regs2 gif-reg-id :offset 72 :size 4)
|
|
|
|
(regs3 gif-reg-id :offset 76 :size 4)
|
|
|
|
(regs4 gif-reg-id :offset 80 :size 4)
|
|
|
|
(regs5 gif-reg-id :offset 84 :size 4)
|
|
|
|
(regs6 gif-reg-id :offset 88 :size 4)
|
|
|
|
(regs7 gif-reg-id :offset 92 :size 4)
|
|
|
|
(regs8 gif-reg-id :offset 96 :size 4)
|
|
|
|
(regs9 gif-reg-id :offset 100 :size 4)
|
|
|
|
(regs10 gif-reg-id :offset 104 :size 4)
|
|
|
|
(regs11 gif-reg-id :offset 108 :size 4)
|
|
|
|
(regs12 gif-reg-id :offset 112 :size 4)
|
|
|
|
(regs13 gif-reg-id :offset 116 :size 4)
|
|
|
|
(regs14 gif-reg-id :offset 120 :size 4)
|
|
|
|
(regs15 gif-reg-id :offset 124 :size 4)
|
|
|
|
)
|
|
|
|
:flag-assert #x900000010
|
|
|
|
)
|
|
|
|
|
2021-04-26 21:40:08 -04:00
|
|
|
(deftype gif-tag-regs (uint64)
|
2021-05-01 21:09:48 -04:00
|
|
|
((regs0 gif-reg-id :offset 0 :size 4)
|
|
|
|
(regs1 gif-reg-id :offset 4 :size 4)
|
|
|
|
(regs2 gif-reg-id :offset 8 :size 4)
|
|
|
|
(regs3 gif-reg-id :offset 12 :size 4)
|
|
|
|
(regs4 gif-reg-id :offset 16 :size 4)
|
|
|
|
(regs5 gif-reg-id :offset 20 :size 4)
|
|
|
|
(regs6 gif-reg-id :offset 24 :size 4)
|
|
|
|
(regs7 gif-reg-id :offset 28 :size 4)
|
|
|
|
(regs8 gif-reg-id :offset 32 :size 4)
|
|
|
|
(regs9 gif-reg-id :offset 36 :size 4)
|
|
|
|
(regs10 gif-reg-id :offset 40 :size 4)
|
|
|
|
(regs11 gif-reg-id :offset 44 :size 4)
|
|
|
|
(regs12 gif-reg-id :offset 48 :size 4)
|
|
|
|
(regs13 gif-reg-id :offset 52 :size 4)
|
|
|
|
(regs14 gif-reg-id :offset 56 :size 4)
|
|
|
|
(regs15 gif-reg-id :offset 60 :size 4)
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
|
|
|
;; we unfortunately kind of need this
|
|
|
|
(defmacro gif-tag->static-array (tag regs)
|
|
|
|
"Allocates a new static array of two uint64's making up the gif-tag and the tag registers"
|
|
|
|
|
|
|
|
`(new 'static 'array uint64 2 ,tag ,regs)
|
2021-04-26 21:40:08 -04:00
|
|
|
)
|
|
|
|
|
2021-08-01 17:11:32 -04:00
|
|
|
(defmacro gif-prim (prim-type)
|
|
|
|
`(new 'static 'gs-prim :prim (gs-prim-type ,prim-type) :iip 1 :abe 1)
|
|
|
|
)
|
|
|
|
|
|
|
|
(defmacro gs-reg-list (&rest reg-ids)
|
|
|
|
"Generate a giftag register descriptor list from reg-ids."
|
|
|
|
|
|
|
|
(let ((reg-count (length reg-ids)))
|
|
|
|
(when (> (length reg-ids) 16)
|
|
|
|
(ferror "too many regs passed to gs-reg-list")
|
|
|
|
)
|
|
|
|
(let ((list-to-splice '())
|
|
|
|
(cur-lst reg-ids)
|
|
|
|
(i -1))
|
|
|
|
|
|
|
|
;; this is questionable.
|
|
|
|
(while (and (not (null? cur-lst)) (< i 15))
|
|
|
|
(push! list-to-splice (cons 'gif-reg-id (cons (car cur-lst) '())))
|
|
|
|
(push! list-to-splice (string->symbol-format ":regs{}" (inc! i)))
|
|
|
|
(pop! cur-lst)
|
|
|
|
)
|
|
|
|
|
|
|
|
`(new 'static 'gif-tag-regs
|
|
|
|
,@list-to-splice
|
|
|
|
)
|
|
|
|
)
|
|
|
|
#| ;; the opengoal compiler does not have enough constant propagation for this for now
|
|
|
|
(let ((i -1))
|
|
|
|
|
|
|
|
`(the-as gif-tag-regs (logior ,@(apply (lambda (x)
|
|
|
|
`(shl (the-as uint (gif-reg-id ,x)) ,(* 4 (inc! i)))
|
|
|
|
) reg-ids)
|
|
|
|
))
|
|
|
|
|
|
|
|
)|#
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
2021-02-22 09:36:30 -05:00
|
|
|
(deftype gs-gif-tag (structure)
|
|
|
|
((qword uint128 :offset-assert 0) ;; is "qword" and inline? in game
|
2021-04-26 21:40:08 -04:00
|
|
|
(tag gif-tag64 :offset 0)
|
|
|
|
(regs gif-tag-regs :offset 8)
|
2021-02-22 09:36:30 -05:00
|
|
|
(dword uint64 2 :offset 0)
|
|
|
|
(word uint32 4 :offset 0)
|
|
|
|
)
|
|
|
|
:method-count-assert 9
|
|
|
|
:size-assert #x10
|
|
|
|
:flag-assert #x900000010
|
|
|
|
)
|
|
|
|
|
2021-07-09 22:20:37 -04:00
|
|
|
(defmethod inspect gif-tag ((obj gif-tag))
|
|
|
|
(format #t "[~8x] gif-tag~%" obj)
|
|
|
|
(format #t "~Tnloop: ~4d~%" (-> obj nloop))
|
|
|
|
(format #t "~Teop : ~4d~%" (-> obj eop))
|
|
|
|
(format #t "~Tid : ~4d~%" (-> obj id))
|
|
|
|
(format #t "~Tpre : ~4d~%" (-> obj pre))
|
|
|
|
(format #t "~Tprim : ~4d~%" (-> obj prim))
|
|
|
|
(format #t "~Tflg : ~4d~%" (-> obj flg))
|
|
|
|
(format #t "~Tnreg : ~4d~%" (-> obj nreg))
|
|
|
|
(format #t "~Tregs0 : ~4d~%" (-> obj regs0))
|
|
|
|
(format #t "~Tregs1 : ~4d~%" (-> obj regs1))
|
|
|
|
(format #t "~Tregs2 : ~4d~%" (-> obj regs2))
|
|
|
|
(format #t "~Tregs3 : ~4d~%" (-> obj regs3))
|
|
|
|
(format #t "~Tregs4 : ~4d~%" (-> obj regs4))
|
|
|
|
(format #t "~Tregs5 : ~4d~%" (-> obj regs5))
|
|
|
|
(format #t "~Tregs6 : ~4d~%" (-> obj regs6))
|
|
|
|
(format #t "~Tregs7 : ~4d~%" (-> obj regs7))
|
|
|
|
(format #t "~Tregs8 : ~4d~%" (-> obj regs8))
|
|
|
|
(format #t "~Tregs9 : ~4d~%" (-> obj regs9))
|
|
|
|
(format #t "~Tregs10: ~4d~%" (-> obj regs10))
|
|
|
|
(format #t "~Tregs11: ~4d~%" (-> obj regs11))
|
|
|
|
(format #t "~Tregs12: ~4d~%" (-> obj regs12))
|
|
|
|
(format #t "~Tregs13: ~4d~%" (-> obj regs13))
|
|
|
|
(format #t "~Tregs14: ~4d~%" (-> obj regs14))
|
|
|
|
(format #t "~Tregs15: ~4d~%" (-> obj regs15))
|
|
|
|
;; original function failed to return this.
|
|
|
|
obj
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
|
2021-04-13 00:36:05 -04:00
|
|
|
;; some nice blue. probably the same as the fog color for geyser/sandover/etc.
|
2021-08-01 17:11:32 -04:00
|
|
|
;; "default" fog color when resetting registers
|
2021-02-22 09:36:30 -05:00
|
|
|
(define *fog-color* #xc88029)
|
|
|
|
|
|
|
|
;; set up a DMA buffer. This will hold a message to set the GS state to normal.
|
|
|
|
;; these regs are NOT the ones mapped in the EE memory, but other internal GS registers.
|
|
|
|
(define *default-regs-buffer* (new 'global 'dma-buffer 1024))
|
|
|
|
|
|
|
|
(defun default-buffer-init ((buff dma-buffer))
|
2021-04-26 21:40:08 -04:00
|
|
|
"Set some GS registers back to default values. Ends with a ret dma-tag.
|
|
|
|
This is intended to live in its own separate dma-buffer and not be added
|
|
|
|
to the global buffer. Calling this will reset this dma-buffer."
|
|
|
|
|
|
|
|
;; reset the buffer.
|
|
|
|
(let ((buff-ptr buff))
|
|
|
|
(set! (-> buff-ptr base) (-> buff-ptr data))
|
|
|
|
(set! (-> buff-ptr end)
|
|
|
|
(&-> buff-ptr data-buffer (-> buff-ptr allocated-length))
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
|
|
|
;; set up a GIF transfer
|
2021-08-01 17:11:32 -04:00
|
|
|
(dma-buffer-add-gs-set-flusha buff
|
|
|
|
(alpha-1 (new 'static 'gs-alpha :b 1 :d 1))
|
|
|
|
(zbuf-1 (new 'static 'gs-zbuf :zbp #x1c0 :psm (gs-psm ct24)))
|
|
|
|
(test-1 (new 'static 'gs-test :atst (gs-atest not-equal) :zte #x1 :ztst (gs-ztest greater-equal)))
|
|
|
|
(pabe 0)
|
|
|
|
(clamp-1 (new 'static 'gs-clamp :wms (gs-tex-wrap-mode clamp) :wmt (gs-tex-wrap-mode clamp)))
|
|
|
|
(tex1-1 (new 'static 'gs-tex1 :mmag 1 :mmin 1))
|
|
|
|
(texa (new 'static 'gs-texa :ta1 #x80))
|
|
|
|
(texclut (new 'static 'gs-texclut :cbw 4))
|
|
|
|
(fogcol *fog-color*)
|
|
|
|
)
|
2021-04-26 21:40:08 -04:00
|
|
|
|
|
|
|
;; return dma-tag.
|
2021-08-01 17:11:32 -04:00
|
|
|
(dma-buffer-add-ret buff)
|
2021-02-22 09:36:30 -05:00
|
|
|
(none)
|
|
|
|
)
|
|
|
|
|
2021-04-26 21:40:08 -04:00
|
|
|
|
2021-02-22 09:36:30 -05:00
|
|
|
(default-buffer-init *default-regs-buffer*)
|
|
|
|
|
2021-04-26 21:40:08 -04:00
|
|
|
|
2021-02-22 09:36:30 -05:00
|
|
|
;; This isn't a dynamic type in the type system, but it's used as one.
|
|
|
|
;; the array at the end is used as a dynamic array.
|
|
|
|
;; NOTE - this gif-packet stuff seems unused. Instead dma-gif-packet is used.
|
|
|
|
;; this seems to use 128-bit integer values, but the compiler gets confused sometimes??
|
|
|
|
|
|
|
|
;; This stuff could be used like this:
|
|
|
|
;; - new gif-packet
|
|
|
|
;; - open-gif-packet
|
|
|
|
;; - add-reg-gif-packet to add a register
|
|
|
|
;; - close-gif-packet
|
|
|
|
;; now you have a reglist gs packet.
|
|
|
|
|
|
|
|
(deftype gif-packet (basic)
|
|
|
|
((reg-count int32 :offset-assert 4)
|
2021-04-26 21:40:08 -04:00
|
|
|
(gif-tag gs-gif-tag :inline :offset-assert 16)
|
|
|
|
(gif-tag0 uint128 :offset 16)
|
2021-02-22 09:36:30 -05:00
|
|
|
(args uint64 1 :offset-assert 32) ;; there's one here already.
|
|
|
|
)
|
|
|
|
(:methods
|
|
|
|
(new (symbol type int) _type_ 0)
|
|
|
|
)
|
|
|
|
:method-count-assert 9
|
|
|
|
:size-assert #x28
|
|
|
|
:flag-assert #x900000028
|
|
|
|
)
|
|
|
|
|
|
|
|
(defmethod new gif-packet ((allocation symbol) (type-to-make type) (arg0 int))
|
|
|
|
"Make a new gif packet with enough room for arg0 64-bit args"
|
|
|
|
(object-new allocation type-to-make
|
|
|
|
(the-as int (+ (-> type-to-make size) (shl (+ arg0 -1) 3)))
|
|
|
|
)
|
|
|
|
)
|
|
|
|
|
|
|
|
(defun open-gif-packet ((arg0 gif-packet))
|
2021-04-26 21:40:08 -04:00
|
|
|
"Initialize an existing gif-packet for 0 registers"
|
2021-02-22 09:36:30 -05:00
|
|
|
(set! (-> arg0 reg-count) 0)
|
2021-04-26 21:40:08 -04:00
|
|
|
(set! (-> arg0 gif-tag regs) (new 'static 'gif-tag-regs))
|
2021-02-22 09:36:30 -05:00
|
|
|
arg0
|
|
|
|
)
|
|
|
|
|
|
|
|
(defun add-reg-gif-packet ((packet gif-packet) (reg-idx int) (reg-val int))
|
2021-04-26 21:40:08 -04:00
|
|
|
"Add a register to the packet"
|
|
|
|
(let ((tag (-> packet gif-tag)))
|
|
|
|
;; shift the register index into the right slot
|
2021-07-23 20:51:26 -04:00
|
|
|
(logior!
|
|
|
|
(-> tag regs)
|
|
|
|
(the-as uint (ash reg-idx (* (-> packet reg-count) 4)))
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
)
|
2021-04-26 21:40:08 -04:00
|
|
|
;; set register value and increment count.
|
|
|
|
(set! (-> packet args (-> packet reg-count)) (the-as uint reg-val))
|
2021-02-22 09:36:30 -05:00
|
|
|
(set! (-> packet reg-count) (+ (-> packet reg-count) 1))
|
|
|
|
(none)
|
|
|
|
)
|
|
|
|
|
2021-04-26 21:40:08 -04:00
|
|
|
(defun close-gif-packet ((arg0 gif-packet) (eop int))
|
|
|
|
"Finish adding registers."
|
|
|
|
(set! (-> arg0 gif-tag tag)
|
|
|
|
(new 'static 'gif-tag64
|
|
|
|
:nloop #x1
|
2021-08-01 17:11:32 -04:00
|
|
|
:flg (gif-flag reg-list)
|
2021-04-26 21:40:08 -04:00
|
|
|
:eop eop
|
|
|
|
:nreg (-> arg0 reg-count)
|
|
|
|
)
|
|
|
|
)
|
2021-02-22 09:36:30 -05:00
|
|
|
arg0
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)
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(deftype draw-context (basic)
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((orgx int32 :offset-assert 4)
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(orgy int32 :offset-assert 8)
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(orgz int32 :offset-assert 12)
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(width int32 :offset-assert 16)
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(height int32 :offset-assert 20)
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(color rgba 4 :offset-assert 24)
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)
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(:methods
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(new (symbol type int int int int rgba) _type_ 0)
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)
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:method-count-assert 9
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:size-assert #x28
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:flag-assert #x900000028
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)
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(defmethod new draw-context ((allocation symbol)
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(type-to-make type)
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(org-x int)
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(org-y int)
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(width int)
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(height int)
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(color-0 rgba)
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)
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"Allocate and initialize a draw-context"
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(let ((obj (object-new allocation type-to-make (the-as int (-> type-to-make size)))))
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(let ((v1-3 (the int (* (the float org-y) (-> *video-parms* relative-y-scale))))
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(a0-2 (the int (* (the float height) (-> *video-parms* relative-y-scale))))
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)
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(set! (-> obj orgx) org-x)
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(set! (-> obj orgy) v1-3)
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(set! (-> obj orgz) #xffffff)
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(set! (-> obj width) width)
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(set! (-> obj height) a0-2)
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)
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(set! (-> obj color 0) color-0)
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obj
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)
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)
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(defun draw-context-set-xy ((arg0 draw-context) (x int) (y int))
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"Set the origin of the draw context, scaling by relative-y-scale as needed."
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(local-vars (v0-0 int))
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(set! v0-0 (the int (* (the float y) (-> *video-parms* relative-y-scale))))
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(set! (-> arg0 orgx) x)
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(set! (-> arg0 orgy) v0-0)
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(none)
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)
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